The 6125 Tape Transport that arrived as part of my MV/9800 system has a fault. From initial testing the device is not asserting Data-Bit 15 on the interface to the MV. This has been established using the following code which transfers the status register of the controller into Accumulator 0 on the CPU:
60422 DIA 0,22
60377 DOC 0
Using this code I conducted the following tests which show the same register values regardless if the tape is on-line or off-line:
Tape Loaded / On-Line - AC0 contains: 104304 (1000100011000100) Tape Loaded / Off-Line - AC0 contains: 104304 (1000100011000100) OCTAL: 1 0 4 3 0 4 BINARY: 1 / 000 / 100 / 011 / 000 / 100
Regardless of the on/off-line state, the last data bit is not transitioning. The following table can be used to interpret the device status:
Bit 0 = Error (ERR) Bit 1 = Data Late (DL)
Bit 2 = Rewinding (RW) Bit 3 = Illegal (IL) - Command cannot be executed due to drive condition Bit 4 = Not Used (Always 1) Bit 5 = Data Error (DE) Bit 6 = End of Tape Marker Detected (EOT) Bit 7 = End of File Detected (Read) or End of File Complete (Write) Bit 8 = Tape at Load Point (BOT) Bit 9 = Not Used (Always 1) Bit 10 = Bad Tape (BT) Bit 11 = Not Used (Always 0) Bit 12 = Not Used (Always 0) Bit 13 = Write Lock (WL) Bit 14 = Odd Character (OC) Record just read contained an odd number of bytes Bit 15 = Unit Ready (R)
The highlighted lines above indicate the status of the drive with octal value 104304 (ignoring the unused bits).
Out of interest I also ran (now i have a booting MV system) the STDD_DIAG under ADEX:
Strangely the on-line / off-line tests seem to work in the STDD_DIAG tests, but the read/write test produces an error. In the above image we can see the diagnostic is writing 052525 but reading 052524 (for some reason the good/bad/word and address) are un-spaced on the console output, again bit-15 is faulty.
I don’t have any schematics to hand for the F/C/S PCB so the first task is to trace the data signal for bit 15 from the interface to the F/C/S PCB logic. This fault may reside in the front end of the interface (I/O Drivers) or may lie further into the circuit closer to the PIA’s or CPU.
Here is what this transport looks like inside:
The unit is (save for the PSU and I/O connector) one housing that swings open on two hinges located on the right of the chassis. The unit can be removed from the chassis once all of the cables and earth straps have been disconnected.
Aside from the PSU the units electronics are contained on two PCB’s the Format/Control/Servo (FCS) PCB and the Read/Write (R/W) PCB, the former being the larger of the two PCB’s with the crescent shaped edge.
In the picture above (F/C/S PCB I/O Drivers) we can see 5 of the 7438 IC’s that form part of the front end I/O interface along with the resistors that pull up each of the I/O signals. It appears that at least 5 of the 7438 IC’s have been replaced on this PCB already so the problem may lie a little deeper, time will tell!
So the first task is to trace the tracks that form the interface logic, specifically data-bit 15 (to begin with). To help me along the way I decided to take a couple of photographs of each side of the PCB, I then printed these on A3 and stuck them together. The result is a flexable PCB!
Lots more to follow……